1. Field of the Invention
The present invention relates to an ion implantation method for forming a dopant implanted layer in a semiconductor substrate and an apparatus for the same.
2. Description of the Prior Art
In manufacturing a semiconductor integrated circuit device, an ion implantation method is commonly used because dopants can thereby be introduced with high accuracy into a very small region in a semiconductor substrate.
FIG. 5 is a schematic view showing the structure of a conventional ion implanting apparatus. The apparatus comprises an ion source 31 and an ion attracting electrode 32. A mass analysis magnet 33 selects dopant ions drawn from the ion source, 31 by the ion attracting electrode 32 so that only a desired kind of ion passes therethrough. An ion accelerator 34 accelerates a beam A comprising the desired ion selected by the mass analysis magnet 33. An X-Y scanner 35 controls the moving direction of an accelerated ion beam B by focusing and deflecting the beam. An ion beam C scanned in an X-Y direction at the X-Y scanner 35 irradiates a wafer 37 held in a sample cell 36. A holder of the wafer 37 in the sample cell 36 includes a mechanism for a mechanical scan and for cooling of a sample by refrigerant or the like. Predetermined dopants can be implanted to a desired region of the semiconductor substrate by forming a mask on the surface of the wafer 37 having a prescribed pattern that defines the region to be implanted with ions.
The energy of the ions which are to be implanted on the wafer 37 is determined by an ion attracting voltage from the ion source 31 and a voltage applied by the ion accelerator 34. Therefore, this energy is determined by the voltage of the ion accelerator when the ion attracting voltage is kept at a constant value.
Generally, the voltage value of the accelerator 34 is set at a predetermined value. FIG. 6 is a graphic representation of the distribution of implanted ions (ions/cm.sup.3) with regard to a depthwise implantation (.mu.m) in a sample (Si) when the voltage is set at a constant value. As will be recognized from FIG. 6, the distribution of the implanted ions assumes a Gaussian distribution in which the peak of the ion concentration is in a region .circle. II depending upon the implanted energy. It should be noted that a region I, which is closer to the surface, and a region .circle. III , which is deeper in the sample, contain much smaller numbers of dopant ions compared to the region .circle. II in this FIG. 6 distribution.
It is characteristic of this process that damages are caused in the dopant implanted layer by ion implantation and are concentrated near a position where the implanted ions rest. Therefore, damages such as a crystal defect caused in the region .circle. II are much more serious than those caused in the regions I, .circle. III , and such damages may include complicated dislocation, clusters, etc. Further, where the prior art ion implantation method is used for the formation of a high concentration dopant region such as the source-drain formation in a MOS transistor, dopants implanted in the region .circle. II may often be far beyond the solubility of the dopants in a solid Si. Accordingly, annealing with a high temperature or annealing for a long period of time so as to diffuse implanted dopants in the regions I, III must be enough to fully activate the implanted ions and displace the same to aimed positions. Annealing with a high temperature or annealing for a long period of time as in the above forces dopant ions to diffuse in the lateral direction in the ion implanted layer, which causes a poor integration of the device. In addition to that, such a heat treatment has an adverse effect on other parts of the device. Thus, there is a problem that fully activating and annealing the dopant implanted layer is very difficult, allowing for coordination with other manufacturing steps.